1. Field of the Invention
The present invention generally relates to electronic systems having components coupled by signaling busses. More specifically, the present invention relates to signaling busses having a fault on one or more signaling conductors in a signaling bus.
2. Description of the Related Art
Electronic systems generally comprise multiple electronic units that are interconnected by signaling conductors. These signaling conductors typically are electrically conducting paths made of copper, aluminum, or other such material. Alternatively, optical fibers also conduct signals.
For example, semiconductor chips drive and receive signals which are electrically coupled to signal conductors on modules using wirebond or flip chip techniques. The modules are typically further coupled to printed wiring board (PWB) signal conductors using copper pins, solder columns, or other means. The signal conductors on PWBs interconnect one module with another, as well as route signals to PWB edge connectors or cable connectors. PWB edge connectors and cable connectors are used to interconnect one PWB with another PWB using a backplane or cables. Even within a semiconductor chip, extremely fine electrical conductors route signals between circuits and logical units on the chip.
A group of logically related signaling conductors is called a signaling bus. For example, a processor chip is connected to a memory control chip by a signaling bus having a specified number of signaling conductors over which data flows substantially in parallel. That is, if the processor chip is coupled to the memory control with an eight bit bus, the processor chip sends eight bits of data (a byte) at substantially the same time, one bit on each of the signaling conductors of the signaling bus. For example, the processor chip transmits an address to the memory control chip of the example a byte at a time, and receives data back from the memory control chip a byte at a time.
Economic and physical factors limit the number of signaling conductors that can be used to interconnect electronic elements. Each interconnect between a module and a card, for example, costs approximately a penny. Large numbers of interconnects on highly price sensitive electronic units is not justified. Furthermore, as many components are mounted on a PWB, large numbers of interconnects force additional wiring layers in the PWB, raising the cost of the PWB. Cabling between electronic units becomes very expensive when many interconnects are used, and thick, many-conductor cables are awkward to handle, costly, and troublesome from a reliability standpoint. At a certain point, it becomes not only costly and not reliable, but physically impossible to add more interconnects.
Typically, one electronic unit must transmit a block of data to another electronic unit. The block of data often is relatively large. For example, cache lines in some modern computer systems are 64 bytes or 128 bytes long. If this block (i.e., a cache line) is to be sent over an eight byte signaling bus, eight or 16 bus cycles (beats), respectively, are required to complete the transfer. In many applications, even larger blocks of data are transferred over signaling busses having even fewer signaling conductors.
Today's electronic systems are expected to operate reliably. Downtime on commercial computer systems relied upon to operate a business can cost enormous dollar amounts from loss of sales. In addition, such downtime can frustrate customers, causing them to turn to a competitor. Many commercial systems are counted on to run 24/7 (i.e., continuously). Unexpected failures causing outages at peak use are very serious problems. Users of such commercial systems typically prefer continued operation, even at a slightly degraded performance, if a failure occurs. Users can then plan for correcting the failure at a more convenient time. Military systems also rely heavily on electronic systems and are further subject to rough use and severe environments. A total failure of an electronic system in a combat environment is likely to result in severe consequences to the user. Spare parts (new cables, new PWBs, etc) may not be available in a combat situation. Continued operation at a slightly degraded performance is therefore preferable in many military applications.
Signaling busses have one or more signaling conductors associated with the signaling bus, typically, signaling busses have multiples of eight signaling conductors. Often, a single extra signaling conductor carries a parity bit. For example, a signaling bus having eight signaling conductors also has a ninth (parity) signaling conductor that carries parity. A parity generator on the sending unit produces a logical value on the parity such that the number of logical “1”s on the bus is always odd (or, in another embodiment, is always even). A parity checker on the receiving unit checks whether the received number of logical “1”s (that is, “odd” or “even”) is as expected. Such a parity generation/checking system can detect a single fault on the signaling bus but cannot correct the fault. When a parity error is detected, the signaling bus can no longer be used to transmit data. Additional signaling conductors can be used to implement “error correction codes” (ECC), which, in many applications can correct a single fault and detect two faults. Use of ECC incurs additional cost associated with the additional signaling conductors. Cyclical Redundancy Code (CRC) use is yet another technique used to find and accommodate errors in transmitting data.
Many modern electronic systems have the capability of performing “wire test” procedures to determine details on faults in signaling busses. For example, a first electronic unit drives a predetermined pattern of logical “1”s and “0”s on a signaling conductor. A second electronic unit coupled to the first by the signaling conductor receives data from the signaling conductor and compares the received pattern against the predetermined pattern. If the received pattern is not the same as the predetermined pattern, the signaling conductor, the driver, or the receiver, is faulty. Such a path would make a signaling bus with or without parity unusable. Even a signaling bus employing ECC having single error correct, double error detect would be in jeopardy, since another failure in an ECC bus would make even the ECC bus unusable. Faults in two signaling conductors would make even a signaling bus having ECC with single bit correct unusable.
Therefore, a need exists to provide method and apparatus that allow a signaling bus having a faulty signaling conductor to operate at a slightly degraded performance.